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Digital Signal Processing with FPGA Implementation

Module name (EN):
Name of module in study programme. It should be precise and clear.
Digital Signal Processing with FPGA Implementation
Degree programme:
Study Programme with validity of corresponding study regulations containing this module.
Electrical Engineering, Bachelor, ASPO 01.10.2012
Module code: E1514
SAP-Submodule-No.:
The exam administration creates a SAP-Submodule-No for every exam type in every module. The SAP-Submodule-No is equal for the same module in different study programs.
P200-0005
Hours per semester week / Teaching method:
The count of hours per week is a combination of lecture (V for German Vorlesung), exercise (U for Übung), practice (P) oder project (PA). For example a course of the form 2V+2U has 2 hours of lecture and 2 hours of exercise per week.
3V+1U (4 hours per week)
ECTS credits:
European Credit Transfer System. Points for successful completion of a course. Each ECTS point represents a workload of 30 hours.
5
Semester: 5
Mandatory course: yes
Language of instruction:
German
Assessment:


[still undocumented]
Applicability / Curricular relevance:
All study programs (with year of the version of study regulations) containing the course.

E1514 (P200-0005) Electrical Engineering, Bachelor, ASPO 01.10.2012 , semester 5, mandatory course
Workload:
Workload of student for successfully completing the course. Each ECTS credit represents 30 working hours. These are the combined effort of face-to-face time, post-processing the subject of the lecture, exercises and preparation for the exam.

The total workload is distributed on the semester (01.04.-30.09. during the summer term, 01.10.-31.03. during the winter term).
60 class hours (= 45 clock hours) over a 15-week period.
The total student study time is 150 hours (equivalent to 5 ECTS credits).
There are therefore 105 hours available for class preparation and follow-up work and exam preparation.
Recommended prerequisites (modules):
E1105
E1410


[updated 14.07.2016]
Recommended as prerequisite for:
E1611


[updated 05.05.2013]
Module coordinator:
Prof. Dr. Martin Buchholz
Lecturer:
Prof. Dr. Martin Buchholz


[updated 14.07.2016]
Learning outcomes:
The students:
- learn how to carry out digital signal processing and analysis of telecommunication signals and systems
- know different structures of discrete-time systems and is able to examine them analytically by using the discrete Fourier transform and z-transform
- know how to develop digital, recursive and non-recursive filters, when confronted with a certain filter specification
- learn to simulate and implement digital algorithms in FPGAs (Field Programmable Gate Arrays)
- learn to implement Digital Algorithms into Field Programmable Gate Arrays (FPGA) using SPW/Synopsys and Vivado/XILINX
- know the design flow of real-time implementation of digital algorithms

[updated 14.07.2016]
Module content:
1. Introduction, motivation
2. Basis
ideal and real sampling, sampling theorem, practical considerations of sampling
3. Discrete-time signals and systems
discrete convolution, FIR and IIR systems
4. Structures of discrete-time systems
5. Depiction of discrete-time signals and systems in the frequency spectrum
6. The z-transform
7. Design of recursive, digital filters
8. Design of non-recursive, digital filters
9. Model-based FPGA implementation of digital algorithms
Examples and practical work are available for all chapters

[updated 14.07.2016]
Recommended or required reading:
Brigham, E.O.: FFT Anwendungen, Oldenbourg, 1997 Goetz, H.: Einführung in die digitale Signalverarbeitung, Teubner, 1998 Hoffmann, J.; Quint F.: Signalverarbeitung mit Matlab und Simulink, Oldenbourg, 2007 Kammeyer, K.-D.; Kroschel K.: Digitale Signalverarbeitung – Filterung und Spektralanalys, Teubner Oppenheim, A. V.; Schafer, R. W.: Zeitdiskrete Signalverarbeitung, Oldenbourg, 1999 Stearns, S.D.; Hush D.R.: Digitale Verarbeitung analoger Signale, Oldenbourg, 1999 von Grünigen, D. Ch.: Digitale Signalverarbeitung, Carl Hanser, 2004 Werner, M.: Digitale Signalverarbeitung mit Matlab, Intensivkurs mit 16 Versuchen, Vieweg, 2006

[updated 14.07.2016]
 
[Mon Dec 23 09:56:47 CET 2024, CKEY=edsb, BKEY=e2, CID=E1514, LANGUAGE=en, DATE=23.12.2024]